Events

The Fraunhofer Institute for Electronic Nano Systems ENAS focuses on smart systems integration by using micro and nano technologies and provides services in:

• Development, design and test of MEMS and NEMS (micro and nano electro mechanical systems)
• Wafer level packaging of MEMS and NEMS, wafer bonding, low temperature bonding
• Metallization and interconnection systems for micro and nano electronics as well as 3D integration
• Adaptive printing technologies inclusively material development and characterization
• Reliability and security of micro and nano systems.

In Sendai, the Fraunhofer Project Center “NEMS/MEMS Devices and Manufacturing Technologies at Tohoku University” was founded as a platform for common research and development activities of Tohoku University and Fraunhofer ENAS. The project center is run to the benefit of both partners as a vehicle for R&D cooperation, technology transfer as well as training and education programs.

• 3D integration technologies and applications  
  Fraunhofer ENAS offers flexible in house TSV fabrication by using TiN, TaN and Cu filling by CVD and ECD as barriers materials on substrates up to 200 mm. Coarse and fine grinding as well as spin etching for Si, SiO2, glass and ceramics are available processes for wafer thinning. Also wafer planarization is operated on Si, SiO2, glass, ceramics, metals and nitrides.

• Low-temperature bonding
  Fraunhofer ENAS offers these technologies for low-temperature wafer bonding:
  – Room-temperature bonding by using reactive nano scale multilayer
  – Anodic bonding (glass/Si)
  – Direct bonding (glass/glass; glass/Si; SiSi)
  – Adhesive bonding (SU-8; BCB)
  – Solid-liquid interdiffusion bonding (CuSn)
  – Thermo-compression bonding

• Solid liquid interdiffusion bonding near room temperature for micro devices
  The development of Ga/Au and Ga/Cu alloy formation near the melting point of gallium is carried out for the application of metal interdiffusion bonding of semiconductors using operation temperatures near room temperature. An electrodeposition process has been developed to uniformly coat semiconductor surfaces with gallium. The process is characterized by the intermetallic composition of the resulting alloys and extensive research of the shear strength, electrical conductivity and hermeticity.

• Nano composites
• Integration of carbon nanotubes and applications
• Aerosol-jet printing
  
  

The center All Silicon System Integration Dresden – ASSID operates Fraunhofer IZMs leading edge industry-compatible 300 (200) mm 3D wafer-level process line with modules for TSV formation, TSV post-processing, pre-assembly, wafer-level assembly, stack formation and with related metrology tools. 

ASSID is focusing on process development, material and equipment evaluation as well as R&D services. 

IZM-ASSID is a partner in national, European and worldwide industrial and scientific networks for 3D system integration, e. g. ITRS, ENIAC, Catrene, EPOSS, Euripides, Sematech and Silicon Saxony. 

Fraunhofer IZM-ASSID has established cooperation and joint development programs with industrial partners with respect to material and equipment evaluation, process development as well as process and product integration.

• TSV silicon interposer
• 3D TSV via middle/via last process integration
• Deposition and patterning of dielectric polymers and metal films
• Multi-layer Cu redistribution with customer-specific terminal pad metallurgies (Cu, Cu/Ni/Au, Cu/SnAg)
• Wafer thinning and thin wafer processing
• Wafer-level bumping (Cu-Pillar, SnAg, CuNiAu)
• Wafer-level solder ball attach (100 – 500 μm)
• Wafer-level assembly
• Die attach (lamination, epoxy, flip chip) on various substrates
• Component assembly (bare die, active and passive SMD components)
• Customer-specific prototyping and pilot line manufacturing
• Material and equipment evaluation, process development, process transfer and product integration