Semicon Japan 2010
Date & Time: Dec.1-3, 2010
Venue: Makuhari Messe (Chiba)
Ultraclean Technology and Micromanufacturing Department of Fraunhofer Institute for Manufacturing Engineering and Automation IPA, as well as Fraunhofer Institute for Reliability and Microintegration IZM-ASSID (All Silicon System Integration Dresden), will both have booths within the German Pavillion at Semicon Japan 2010.
They will present the following services:
(Booth Number: 7C-901-m)
Fraunhofer IZM-ASSID provides Wafer Level Packaging prototyping services (200mm/300mm). Its facility is open to industry for material, equipment and process evaluation and improvement as well as for institutes for research and development activities.
Technological services that will be presented at Semicon include:
• TSV formation in silicon device wafer
• Redistribution layers (RDL) with customerspecific terminal pad metallurgies
• Silicon interposer with TSV and multilayer RDL
• Wafer thinning and thin wafer processing
• Wafer-level bumping (fine pitch)
• Wafer-level assembly
• Customer specific prototyping
(Booth Number: 7C-901-n)
With more than twenty (20) years of experience and a most modern infrastructure, Fraunhofer IPA is THE independent, internationally renowned test center for cleanroom certification, and certification of cleanliness as well as cleanroom suitability of process and automation equipment, components, and materials.
Range of services (Extract):
• Particle detection
• Particle analysis
• Outgassing behaviour (AMC)
• ESD behaviour
• Design analysis (GMP/EHEDG)
• Chemical resistance (Disinfecting agents)
• Air flow behaviour
• Surface quality
Furthermore we support our project partners regarding the cleanroom-suitable design, and offer workshops as well as trainings for their personnel.
Entrance to the exhibition is free of charge.
Registration fees for seminars and receptions vary. Please see the Semicon Japan 2010-Homepage for details.