IEEE CPMT Symposium Japan 2010

Date & Time: August 24-26, 2010
Venue: The University of Tokyo, Hongo Campus, Faculty of Engineering Bldg.2, Sanjo Conference Hall

At this event there will be presentations by Rolf ASCHENBRENNER (President, CPMT Society, IEEE; Fraunhofer IZM) and Dr. Klaus-Dieter LANG (Fraunhofer IZM).

Technical Topics of this Workshop

    * System in a Package (SiP)
    * Advanced Fine Pitch Packaging
    * 3D Packaging & COC (Chip on Chip)
    * Wafer Level CSP
    * Packaging for Optoelectronics
    * Packaging for Automobile
    * RF Components & Modules / RF Tags
    * Green Material
    * Integrated Passives /Embedded Components
    * Laminated Materials & Processing
    * MEMS Packaging Technologies
    * Nanotechnology
    * Micro Bumping Technology
    * Electrical Performance & Thermal Management
    * Failure Mechanisms & Reliability Improvement
    * Materials for High Speed Application & Wafer Process
    * Board level reliability System in a Package (SiP)
    * Assembly and Packaging Challenges for Cu/Low-k Chips
    * Emerging Technologies

<PROGRAM>
Please see the attached PDF-file below for the full program of this event.

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