Event

2nd International IEEE Workshop on Low Temperature Bonding for 3D Integration

Date & Time: January 19-20, 2010
Venue: The University of Tokyo, Hongo


This workshop aims at 3D-LSI /photonic/MEMS packaging based on rapidly emerging low-temperature bonding technology as well as other high density inter-connect technologies. This workshop solicits papers that document new developments and cover the full range of basic science, process technologies, and device applications of low-temperature bonding technology. Presentations on bonding of novel materials to synthesize heterostructures, products applications of 3D integration of LSI/photonic/ MEMS devices are also encouraged.

At this workshop some researchers from Fraunhofer institutes will give lectures in the sessions "low temperature bonding: new methods" and "3D Integration".


<PROGRAMM>
January 19. Tuesday

9:00- Registration

9:30-9:40
Opening Remarks
by Conference Chair Prof. T. Suga

<Conference Keynote>
9:40-10:10
Surface Activated Bonding - An Overview and Cu Direct Bonding
by Tadatomo Suga, The University of Tokyo; Akitsu Shigeto, NIMS

<Low Temperture Bonding: Fundamentals>
10:10-11:00
Low Temperature Bonding of Thermally Mismatched Substrates
by Shari Farrens, SUSS Micro Tec.

11:00-11:30
Low Temperature Plasma or CMP Assisted Direct Bonding
by H. Moriceau, F.Rieutord, L. Di Cioccio, P. Gueguen, S. Pocas, F. Foumel, C. Morales, CEA, LETI, MINATEC

11:30-12:00
Low Temperature Direct Oxide Bonding (ZiBond) and Direct Bond Interconnect (DBI)
by Paul Enquist, Ziptronix, Inc.

12:00-13:30 Lunch

<Low temperature Bonding: Applications>
13:30-14:10
Wafer Level 3D Integration Enabled by Low Temperature Bonding Technology
by Ionut Radu, Mariam Sadaka, SOITEC

14:10-14:40
Low Temperature Direct Wafer Bonding Process for Back Side Illumination Image Sensors and 3D Stacking
by A. Castex, M. Broekaart, L Marinier, E. Neyret, S. Golliet, M. Haye, E. Davienne, S. Molinari, M. Martinez, S. Signamarcheix, R. Fontaniere, C. Lagahe, SOITEC

14:40-15:10
Wafer Bonding for Backside Illuminated CMOS Image Sensors Fabrication: Challenges and Promises
by Viorel Dragoi, EV Group

15:10-15:40
Low Temperature Wafer Bonding Processes and their Application to Microfabrication
by Alain Bosseboeuf, University Paris South

15:40-16:00 COFFEE BREAK

<Low Temperature Bonding: New Method>
16:00-16:30
Hydrophobic Wafer Bonding and Characterization of the Interface Dislocations
by Manfred Reiche, Max-Planck Institut for Mikrostrukturphysik, Halle

16:30-17:00
Status of Low Temperature Wafer Bonding Using Reactive Multilayer Films
by B. Boettge*1, M. Petzold*1, M. Wiemer*2 and J. Bagdahn*3, 1: Fraunhofer IWM; 2: Fraunhofer ENAS; 3: Fraunhofer CSP

17:00-17:30
Nanoporous Gold for Low Temperature Bonding
by Hermann Oppermann, L. Dietrich, M. Klien, H. Reichel, Fraunhofer IZM

17:30-18:00
Direct Wafer Bonding of ALD Al2O3
by T. Suni*1,3, R.L. Puurunen *1, O. Zlivaara*1, K. Henttinen*2, T. Ishida*3, H. Fujita*3, 1: VTT Technical Research Center of Finland, 2: Okmetic Oyj, 3: Institute of Industrial Science, University of Tokyo

18:30- RECEPTION (Restaurant Capo Pellicano)

January 20. Wednesday

<Surface Activated Bonding: Fundamentals and Volume Production>
9:00-9:30
Low Temperature Process for Micro-assembly of Opto-Microsystems using Surface Activated Bonding Method
by Eiji Higurashi, The University of Tokyo 

9:30-9:50
Bumpless Wafer Level Bonding for Vertical Integration MEMS
by Makoto Moriguchi, OMRON

9:50-10:10
Investigation of Adhesion in Clad Materials by SAB Method and its Application in Volume Productions
by Hironao Okayama, Toyo Kohan Co., Ltd.

10:10-10:30
Temperature Compensated LiTaO3/Sapphire SAW Devices Using Surface Activated Bonding
by M. Miura, T. Matsuda, M. Ueda, Y. Satoh*1, T. Nishizawa*2 and H. Takagi*3, 1: Fujitsu Laboratories Ltd., 2: Fujitsu Media Devices Ltd., 3: AIST

10:30-11:00
Atomic Diffusion Bonding of  Wafers with Thin Nanocrystalline Metal Films
by Takehito Shimatsu, Tohoku University

11:00-11:15 SHORT BREAK

11:15-12:00 SHORT PRESENTATIONS FOR POSTER

12:00-13:30 LUNCH: POSTER SESSION

<3D Integration>
13:30-14:20
3D Integration and its Process
by Eric Beyne, IMEC 

14:20-14:50
Low Temperature Die-Level Bonding for 3D Packaging, 3D Stacked Integrated Circuits and 3D Silicon Interposers
by Dorota Tempel, RTI

14:50-15:20
Temporary Wafer Bonding for Wafer Thinning and Backside Processing - Key Technology for 3D System Integration
by K. Zoschke, M.J. Wolf, O. Ehrmann, H. Reichel, Fraunhofer IZM 

15:20-15:50
3D Stacking of Multiple Silicon Plates using Direct Wafer Bonding for Novel Lightweight Focusing X-Ray Optics
by R. Gunther, M. Ackermann and M. Collon, Cosine Research BV

15:50-16:10 COFFEE BREAK

<Layer Transfer in Wafer Bonding>
16:10-16:50
Germanium to Silicon Low Temperature Direct Bonding and Layer Transfer Using Remote Plasma Activation
by Cindy Colinge, Tyndall National Institute

16:50-17:10
Novel Low Damage and Low Temperature Direct Wafer Bonding Processes Using Buried Oxide Protection Layers for Fabricating III-V-On-Insulator on Si Structures
by M. Yokoyama*1, T. Yasuda*2, H. Takagi*2, H. Yamada*3, Y. Urabe*2, H. Ishii*2, N. Fukuhara*3, M. Hata*3, M. Sugiyama*1, Y. Nakano*1, M. Takenaka*1 and S. Takagi*1, 1: The University of Tokyo, 2: AIST, 3: Sumitomo Chemical Co. Ltd. 

17:10-17:50
Understanding Strain and Strain Relaxation during Layer Transfer and Patterning in Wafer Bonding
by Helmut Baumgart, Old Dominion University

17:50-18:00
Closing Remarks
by Prof. Cindy Colinge

<REGISTRATION>
Please register yourself at the Website http://www.3dwb.org/ under "Registration"

  • Official site "2nd International IEEE Workshop on Low Temperature Bonding for 3D Integration"